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Effect of well and substrate parameters on the latchup degradation of CMOS structures during e-beam voltage contrast measurements

Effect of well and substrate parameters on the latchup degradation of CMOS structures during e-beam voltage contrast measurements

F.M. Roche; S.D. Bocus; P. Girard
  • 作者F.M. Roche; S.D. Bocus; P. Girard
  • 卷第15卷
  • 印刷ISSN0167-9317
  • 文件大小173.91KB
  • 发表时间1991
  • DOI10.1016/0167-9317(91)90193-h
  • 页码113-116
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