[IEEE Comput. Soc. Press 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Cambridge, MA, USA (11-14 Oct. 1992)] Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Comparing layouts with HDL models: a formal verification technique
Kam, T.; Subrahmanyam, P.A.
- 作者Kam, T.; Subrahmanyam, P.A.
- 文件大小430.70KB
- 发表时间1992
- DOI10.1109/iccd.1992.276220
- 页码588-591