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[IEEE [1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Nara, Japan (May 14-15, 1993)] [Proceedings] 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Capacitance Calculation Of VLSI Multilevel Wiring Structures

[IEEE [1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Nara, Japan (May 14-15, 1993)] [Proceedings] 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Capacitance Calculation Of VLSI Multilevel Wiring Structures

Bauer, R.; Stiftinger, M.; Selberherr, S.
  • 作者Bauer, R.; Stiftinger, M.; Selberherr, S.
  • 文件大小242.18KB
  • 发表时间1993
  • DOI10.1109/vpad.1993.724760
  • 页码142-143
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