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[IEEE [1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Nara, Japan (May 14-15, 1993)] [Proceedings] 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Multipole Accelerated 3-D Interconnect Analysis

[IEEE [1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Nara, Japan (May 14-15, 1993)] [Proceedings] 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD) - Multipole Accelerated 3-D Interconnect Analysis

Nabors, K.; Karnon, M.; White, J.

作者Nabors, K.; Karnon, M.; White, J.
文件大小304.58KB
发表时间1993
DOI10.1109/vpad.1993.724728
页码72-75

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