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[IEEE International Conference on Microelectronic Test Structures - Nara, Japan (22-25 March 1995)] Proceedings International Conference on Microelectronic Test Structures - Defect parameter extraction in backend process steps using a multilayer checkerboard test structure

[IEEE International Conference on Microelectronic Test Structures - Nara, Japan (22-25 March 1995)] Proceedings International Conference on Microelectronic Test Structures - Defect parameter extraction in backend process steps using a multilayer checkerboard test structure

Hess, C.; Weiland, L.H.

作者Hess, C.; Weiland, L.H.
文件大小1014.47KB
发表时间1995
DOI10.1109/icmts.1995.513944
页码51-56

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