SOI-DRAM circuit technologies for low power high speed multigiga scale memories
- 作者Kuge, S.; Morishita, F.; Tsuruda, T.; Tomishima, S.; Tsukude, M.; Yamagata, T.; Arimoto, K.
- 卷第31卷
- 期第4期
- 文件大小1170.27KB
- 发表时间1996
- DOI10.1109/4.499736
- 页码586-591
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[Japan Soc. Applied Phys 1995 Symposium on VLSI Circuits. Digest of Technical Papers - Kyoto, Japan (8-10 June 1995)] Digest of Technical Papers., Symposium on VLSI Circuits. - A current direction sense technique for multi-port SRAMsIzumikawa, M.; Yamashina, M. · 1995
[IEEE IEEE 1995 Custom Integrated Circuits Conference - Santa Clara, CA, USA (1-4 May 1995)] Proceedings of the IEEE 1995 Custom Integrated Circuits Conference - 100 MHz, 0.55 mm/sup 2/, 2 mW, 16-b stacked-CMOS multiplier-accumulatorIgura, H.; Izumikawa, M.; Furuta, K.; Ito, H.; Wakabayashi, H.; Nakajima, K.; Mogami, T.; Horiuchi, T.; Yamashina, M. · 1995
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