[IEEE Comput. Soc. Press Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Boston, MA, USA (6-8 Nov. 1996)] Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Optimising high-level synthesis for self-checking arithmetic circuits
Antola, A.; Piuri, V.; Sami, M.
- 作者Antola, A.; Piuri, V.; Sami, M.
- 文件大小503.48KB
- 发表时间1996
- DOI10.1109/DFTVS.1996.572033
- 页码268-276