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[IEEE Comput. Soc. Press EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition - Geneva, Switzerland (16-20 Sept. 1996)] Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition - A high-level synthesis approach to optimum design of self-checking circuits

[IEEE Comput. Soc. Press EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition - Geneva, Switzerland (16-20 Sept. 1996)] Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition - A high-level synthesis approach to optimum design of self-checking circuits

Antola, A.; Piuri, V.; Sami, M.

作者Antola, A.; Piuri, V.; Sami, M.
文件大小703.86KB
发表时间1996
DOI10.1109/eurdac.1996.558233
页码382-387

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