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[IEEE Comput. Soc. Press Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125) - Monterey, CA, USA (27 April-1 May 1997)] Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125) - Using ATPG for clock rules checking in complex scan designs

[IEEE Comput. Soc. Press Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125) - Monterey, CA, USA (27 April-1 May 1997)] Proceedings. 15th IEEE VLSI Test Symposium (Cat. No.97TB100125) - Using ATPG for clock rules checking in complex scan designs

Wohl, P.; Waicukauski, J.

作者Wohl, P.; Waicukauski, J.
文件大小756.22KB
发表时间1997
DOI10.1109/VTEST.1997.599463
页码130-136

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