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[IEEE 1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing - Leicester, UK (3-5 Nov. 1997)] 1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing - A low-power architecture for phase-splitting passband equalizer

[IEEE 1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing - Leicester, UK (3-5 Nov. 1997)] 1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing - A low-power architecture for phase-splitting passband equalizer

Hegde, R.; Shanbhag, N.R.

作者Hegde, R.; Shanbhag, N.R.
文件大小566.46KB
发表时间1997
DOI10.1109/sips.1997.626276
页码385-394

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