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[IEEE 1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing - Leicester, UK (3-5 Nov. 1997)] 1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing - Multithreaded systolic/SIMD DSP array processor-MUS2DAP

[IEEE 1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing - Leicester, UK (3-5 Nov. 1997)] 1997 IEEE Workshop on Signal Processing Systems. SiPS 97 Design and Implementation formerly VLSI Signal Processing - Multithreaded systolic/SIMD DSP array processor-MUS2DAP

Sernec, R.; Zajc, M.; Tasic, J.F.

作者Sernec, R.; Zajc, M.; Tasic, J.F.
文件大小578.92KB
发表时间1997
DOI10.1109/sips.1997.626309
页码448-457

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