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[IEEE Comput. Soc International Workshop on Memory Technology, Design and Testing - San Jose, CA, USA (24-25 Aug. 1998)] Proceedings. International Workshop on Memory Technology, Design and Testing (Cat. No.98TB100236) - A modular embedded DRAM core concept in 0.24 μm technology

[IEEE Comput. Soc International Workshop on Memory Technology, Design and Testing - San Jose, CA, USA (24-25 Aug. 1998)] Proceedings. International Workshop on Memory Technology, Design and Testing (Cat. No.98TB100236) - A modular embedded DRAM core concept in 0.24 μm technology

Schonemann, K.

作者Schonemann, K.
文件大小448.03KB
发表时间1998
DOI10.1109/mtdt.1998.705941
页码18-23

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