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[Japan Soc. Appl. Phys 1999 Symposium on VLSI Circuits. Digest of Technical Papers - Kyoto, Japan (17-19 June 1999)] 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) - A source-line programming scheme for low voltage operation NAND flash memories

[Japan Soc. Appl. Phys 1999 Symposium on VLSI Circuits. Digest of Technical Papers - Kyoto, Japan (17-19 June 1999)] 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) - A source-line programming scheme for low voltage operation NAND flash memories

Takeuchi, K.; Satoh, S.; Imamiya, K.; Sugiura, Y.; Nakamura, H.; Himeno, T.; Ikehashi, T.; Kanda, K.; Hosono, K.; Sakui, K.
  • 作者Takeuchi, K.; Satoh, S.; Imamiya, K.; Sugiura, Y.; Nakamura, H.; Himeno, T.; Ikehashi, T.; Kanda, K.; Hosono, K.; Sakui, K.
  • 文件大小259.39KB
  • 发表时间1999
  • DOI10.1109/vlsic.1999.797227
  • 页码37-38
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