[IEEE Comput. Soc IEEE European Test Workshop - Cascais, Portugal (23-26 May 2000)] Proceedings IEEE European Test Workshop - CA-CSTP: a new BIST architecture for sequential circuits
- 作者Corno, F.; Sonza Reorda, M.; Squillero, G.; Violante, M.
- 文件大小409.87KB
- 发表时间2000
- DOI10.1109/ETW.2000.873795
- 页码167-172
[IEEE 2009 7th International Symposium on Modeling and Optimization in Mobile, Ad Hoc, and Wireless Networks - WiOpt 2009 - Seoul (2009.06.23-2009.06.27)] 2009 7th International Symposium on Modeling and Optimization in Mobile, Ad Hoc, and Wireless Networks - Copyright2009
[IEEE 2009 7th International Symposium on Modeling and Optimization in Mobile, Ad Hoc, and Wireless Networks - WiOpt 2009 - Seoul (2009.06.23-2009.06.27)] 2009 7th International Symposium on Modeling and Optimization in Mobile, Ad Hoc, and Wireless Networks - Author index2009
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