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[IEEE Comput. Soc Ninth Asian Test Symposium - Taipei, Taiwan (4-6 Dec. 2000)] Proceedings of the Ninth Asian Test Symposium - Simulation of resistive bridging fault to minimize the presence of intermediate voltage and oscillation in CMOS circuits

[IEEE Comput. Soc Ninth Asian Test Symposium - Taipei, Taiwan (4-6 Dec. 2000)] Proceedings of the Ninth Asian Test Symposium - Simulation of resistive bridging fault to minimize the presence of intermediate voltage and oscillation in CMOS circuits

Keshk, A.; Miura, Y.; Kinoshita, K.

作者Keshk, A.; Miura, Y.; Kinoshita, K.
文件大小416.91KB
发表时间2000
DOI10.1109/ats.2000.893613
页码120-124

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