[IEEE 5th International Conference on Signal Processing - Beijing, China (21-25 Aug. 2000)] WCC 2000 - ICSP 2000. 2000 5th International Conference on Signal Processing Proceedings. 16th World Computer Congress 2000 - The design of a low-complexity systolic architecture for fast bit-parallel exponentiation in a class of GF(2/sup m/)
- 作者Chiou-Yng Lee, ; Erl-Huei Lu, ; Lir-Fang Sun,
- 卷第1卷
- 文件大小561.89KB
- 发表时间2000
- DOI10.1109/icosp.2000.894561
- 页码598-604
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