[IEEE Comput. Soc IEEE International High Level Design Validation and Test Workshop (HLDVT'02) - Cannes, France (27-29 Oct. 2002)] Seventh IEEE International High-Level Design Validation and Test Workshop, 2002. - Formal verification of embedded system designs at multiple levels of abstraction
Xi Chen, ; Fang Chen, ; Hsieh, H.; Balarin, F.; Watanabe, Y.
- 作者Xi Chen, ; Fang Chen, ; Hsieh, H.; Balarin, F.; Watanabe, Y.
- 文件大小531.06KB
- 发表时间2002
- DOI10.1109/hldvt.2002.1224441
- 页码125-130