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[Lecture Notes in Computer Science] Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation Volume 2451 || Performance Comparison of VLSI Adders Using Logical Effort

[Lecture Notes in Computer Science] Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation Volume 2451 || Performance Comparison of VLSI Adders Using Logical Effort

Hochet, Bertrand; Acosta, Antonio J.; Bellido, Manuel J.
  • 作者Hochet, Bertrand; Acosta, Antonio J.; Bellido, Manuel J.
  • 文件大小133.79KB
  • 发表时间2002
  • DOI10.1007/3-540-45716-x_3
  • 页码25-34
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