[IEEE 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) - San Francisco, CA, USA (Feb 3-7, 2002)] 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) - A 1.3GSample/s 10-tap full-rate variable latency self-timed FIR filter with clocked interfaces
Tierno, J.; Rylyakov, A.; Rylov, S.; Singh, M.; Ampadu, P.; Nowick, S.; Immediato, M.; Gowda, S.
- 作者Tierno, J.; Rylyakov, A.; Rylov, S.; Singh, M.; Ampadu, P.; Nowick, S.; Immediato, M.; Gowda, S.
- 卷第2卷
- 文件大小524.14KB
- 发表时间2002
- DOI10.1109/isscc.2002.992100
- 页码42-393