[IEEE ASP-DAC 2005. Asia and South Pacific Design Automation Conference 2005 - Shanghai, China (18-21 Jan. 2005)] Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005. - Clock network minimization methodology based on incremental placement
Liang Huang, ; Yici Cai, ; Qiang Zhou, ; Xianlong Hong, ; Jiang Hu, ; Yongqiang Lu,
- 作者Liang Huang, ; Yici Cai, ; Qiang Zhou, ; Xianlong Hong, ; Jiang Hu, ; Yongqiang Lu,
- 卷第1卷
- 文件大小817.94KB
- 发表时间2005
- DOI10.1109/ASPDAC.2005.1466138
- 页码99-102