[IEEE 2007 IEEE Radio Frequency Integrated Circuits Symposium - Honolulu, HI, USA (2007.06.3-2007.06.5)] 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - CPW and discontinuities modeling for circuit design up to 110 GHz in SOI CMOS technology.
Siligaris, A.; Mounet, C.; Reig, B.; Vincent, P.
- 作者Siligaris, A.; Mounet, C.; Reig, B.; Vincent, P.
- 印刷ISSN1529-2517
- 文件大小3793.85KB
- 发表时间2007
- DOI10.1109/rfic.2007.380886
- 页码295-298