[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Analysis of Power Consumption and BER of Flip-flop Based Interconnect Pipelining
- 作者Xu, Jingye; Roy, Abinash; Chowdhury, Masud H.
- 文件大小227.79KB
- 发表时间2007
- DOI10.1109/date.2007.364461
- 页码1-6
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