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[IEEE 2008 IEEE International Frequency Control Symposium - Honolulu, HI (2008.05.19-2008.05.21)] 2008 IEEE International Frequency Control Symposium - An all-digital PLL using frequency multiplying/dividing number with decimals in 0.18-μm digital CMOS

[IEEE 2008 IEEE International Frequency Control Symposium - Honolulu, HI (2008.05.19-2008.05.21)] 2008 IEEE International Frequency Control Symposium - An all-digital PLL using frequency multiplying/dividing number with decimals in 0.18-μm digital CMOS

Takamoto Watanabe, ; Shigenori Yamauchi, ; Tomohito Terasawa,

作者Takamoto Watanabe, ; Shigenori Yamauchi, ; Tomohito Terasawa,
文件大小528.49KB
发表时间2008
DOI10.1109/freq.2008.4623058
页码544-549

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