[IEEE 2008 International Solid-State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2008.02.3-2008.02.7)] 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers - A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques

Bae, Seung-Jun; Sohn, Young-Soo; Park, Kwang-Il; Kim, Kyoung-Ho; Chung, Dae-Hyun; Kim, Jin-Gook; Kim, Si-Hong; Park, Min-Sang; Lee, Jae-Hyung; Bang, Sam-Young; Lee, Ho-Kyung; Park, In-Soo; Kim, Jae-Sung; Kim, Dae-Hyun; Kim, Hye-Ran; Shin, Yong-Jae; Park, Cheol-Goo; Moon, Gil-Shin; Yeom, Ki-Woong; Kim, Kang-Young; Lee, Jae-Young; Yang, Hyang-Ja; Jang, Seong-Jin; Choi, Joo Sun; Jun, Young-Hyun; Kim, Kinam

作者Bae, Seung-Jun; Sohn, Young-Soo; Park, Kwang-Il; Kim, Kyoung-Ho; Chung, Dae-Hyun; Kim, Jin-Gook; Kim, Si-Hong; Park, Min-Sang; Lee, Jae-Hyung; Bang, Sam-Young; Lee, Ho-Kyung; Park, In-Soo; Kim, Jae-Sung; Kim, Dae-Hyun; Kim, Hye-Ran; Shin, Yong-Jae; Park, Cheol-Goo; Moon, Gil-Shin; Yeom, Ki-Woong; Kim, Kang-Young; Lee, Jae-Young; Yang, Hyang-Ja; Jang, Seong-Jin; Choi, Joo Sun; Jun, Young-Hyun; Kim, Kinam
文件大小661.77KB
发表时间2008
DOI10.1109/isscc.2008.4523165
页码278-613

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[IEEE 2008 International Solid-State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2008.02.3-2008.02.7)] 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers - A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques