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[IEEE 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Vienna, Austria (2010.04.14-2010.04.16)] 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS

[IEEE 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Vienna, Austria (2010.04.14-2010.04.16)] 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS

Aunet, Snorre; Hasanbegovic, Amir

作者Aunet, Snorre; Hasanbegovic, Amir
文件大小1079.57KB
发表时间2010
DOI10.1109/ddecs.2010.5491770
页码267-272

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