Architectures and Circuit Techniques for Multi-Purpose Digital Phase Lock Loops
Nagaraj, Krishnaswamy; Kamath, Anant S.; Subburaj, Karthik; Chattopadhyay, Biman; Nayak, Gopalkrishna; Evani, Satya Sai; Nayak, Neeraj P.; Prathapan, Indu; Zhang, Frank; Haroun, Baher
- 期刊名称IEEE Transactions on Circuits and Systems I: Regular Papers
- 作者Nagaraj, Krishnaswamy; Kamath, Anant S.; Subburaj, Karthik; Chattopadhyay, Biman; Nayak, Gopalkrishna; Evani, Satya Sai; Nayak, Neeraj P.; Prathapan, Indu; Zhang, Frank; Haroun, Baher
- 卷第60卷
- 期第3期
- 印刷ISSN1549-8328
- 电子ISSN1558-0806
- 文件大小3008.48KB
- 发表时间2013-03
- DOI10.1109/TCSI.2013.2246311
- 页码517-528