[IEEE 2013 36th International Conference on Telecommunications and Signal Processing (TSP) - Rome, Italy (2013.07.2-2013.07.4)] 2013 36th International Conference on Telecommunications and Signal Processing (TSP) - FPGA based hardware architectures for iterative algorithms implementations
- 作者Belean, Bogdan; Borda, Monica; Bot, Adrian
- 文件大小1751.71KB
- 发表时间2013
- DOI10.1109/TSP.2013.6614038
- 页码751-754
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