[IEEE 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) - New York City, NY, USA (2013.10.2-2013.10.4)] 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) - BIST for logic and local interconnect resources in a novel mesh of cluster FPGA
Rehman, Saif-Ur; Benabdenbi, Mounir; Anghel, Lorena
- 作者Rehman, Saif-Ur; Benabdenbi, Mounir; Anghel, Lorena
- 文件大小784.40KB
- 发表时间2013
- DOI10.1109/dft.2013.6653622
- 页码296-301