[IEEE 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) - Darmstadt, Germany (2013.07.10-2013.07.12)] 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) - Register allocation for high-level synthesis of hardware accelerators targeting FPGAs
- 作者Hempel, Gerald; Hoyer, Jan; Pionteck, Thilo; Hochberger, Christian
- 文件大小371.95KB
- 发表时间2013
- DOI10.1109/recosoc.2013.6581522
- 页码1-6
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