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[IEEE 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC) - KaoHsiung, Taiwan (2014.11.10-2014.11.12)] 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC) - A 1 V 59 fJ/Step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback

[IEEE 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC) - KaoHsiung, Taiwan (2014.11.10-2014.11.12)] 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC) - A 1 V 59 fJ/Step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback

Zhang, Yi; Chen, Chia-Hung; He, Tao; Meng, Xin; Qian, Nancy; Liu, Ed; Elliott, Phillip; Temes, Gabor C.
  • 作者Zhang, Yi; Chen, Chia-Hung; He, Tao; Meng, Xin; Qian, Nancy; Liu, Ed; Elliott, Phillip; Temes, Gabor C.
  • 文件大小845.87KB
  • 发表时间2014
  • DOI10.1109/ASSCC.2014.7008925
  • 页码321-324
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