[IEEE 2015 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) - Ixtapa, Zihuatanejo, Mexico (2015.11.4-2015.11.6)] 2015 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) - FPGA-based design and implementation of a phase detector to correct the I/Q imbalance
Niubo-Aleman, Thaimi; Valdez, Jose Ricardo Cardenas; Galaviz-Aguilar, Jose Alejandro; Reynoso-Hernandez, J. Apolinar; Garcia-Ortega, Manuel de Jesus; Nunez-Perez, Jose Cruz
- 作者Niubo-Aleman, Thaimi; Valdez, Jose Ricardo Cardenas; Galaviz-Aguilar, Jose Alejandro; Reynoso-Hernandez, J. Apolinar; Garcia-Ortega, Manuel de Jesus; Nunez-Perez, Jose Cruz
- 文件大小872.57KB
- 发表时间2015
- DOI10.1109/ropec.2015.7395116
- 页码1-5