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A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for Supply Voltage Droop Tolerance Across a Wide Operating Range

A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for Supply Voltage Droop Tolerance Across a Wide Operating Range

Bowman, Keith A.; Raina, Sarthak; Bridges, J. Todd; Yingling, Daniel J.; Nguyen, Hoan H.; Appel, Brad R.; Kolla, Yesh N.; Jeong, Jihoon; Atallah, Francois I.; Hansquine, David W.
  • 期刊名称IEEE Journal of Solid-State Circuits
  • 作者Bowman, Keith A.; Raina, Sarthak; Bridges, J. Todd; Yingling, Daniel J.; Nguyen, Hoan H.; Appel, Brad R.; Kolla, Yesh N.; Jeong, Jihoon; Atallah, Francois I.; Hansquine, David W.
  • 卷第51卷
  • 期第1期
  • 印刷ISSN0018-9200
  • 电子ISSN1558-173X
  • 文件大小2533.64KB
  • 发表时间2016-1
  • DOI10.1109/JSSC.2015.2473655
  • 页码8-17
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