SyReC: A hardware description language for the specification and synthesis of reversible circuits
- 期刊名称Integration, the VLSI Journal
- 作者Wille, Robert; Schönborn, Eleonora; Soeken, Mathias; Drechsler, Rolf
- 卷第53卷
- 印刷ISSN0167-9260
- 文件大小2029.81KB
- 发表时间2016-03
- DOI10.1016/j.vlsi.2015.10.001
- 页码39-53
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