Impact of floorplanning and thermal vias placement on temperature in 2D and 3D processors
- 期刊名称Microelectronics Journal
- 作者Zajac, Piotr; Galicia, Melvin; Maj, Cezary; Napieralski, Andrzej
- 卷第52卷
- 印刷ISSN0026-2692
- 文件大小13079.88KB
- 发表时间2016-06
- DOI10.1016/j.mejo.2016.02.013
- 页码40-48
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