[IEEE 2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA) - Bengaluru, India (2016.1.10-2016.1.12)] 2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA) - FPGA implementation of face recognition system using efficient 5/3 2D-lifting scheme
Bhairannawar, Satish S; Kumar, Rajath; Mirji, Varsha; Sindhu, P S
- 作者Bhairannawar, Satish S; Kumar, Rajath; Mirji, Varsha; Sindhu, P S
- 文件大小2345.46KB
- 发表时间2016
- DOI10.1109/VLSI-SATA.2016.7593025
- 页码1-5