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[IEEE 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - Tallinn, Estonia (2016.9.26-2016.9.28)] 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - A Hybrid Power Estimation Technique to improve IP power models quality

[IEEE 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - Tallinn, Estonia (2016.9.26-2016.9.28)] 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) - A Hybrid Power Estimation Technique to improve IP power models quality

Nocua, Alejandro; Virazel, Arnaud; Bosio, Alberto; Girard, Patrick; Chevalier, Cyril
  • 作者Nocua, Alejandro; Virazel, Arnaud; Bosio, Alberto; Girard, Patrick; Chevalier, Cyril
  • 文件大小1326.56KB
  • 发表时间2016
  • DOI10.1109/vlsi-soc.2016.7753582
  • 页码1-6
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