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Basic-Set Trellis Min–Max Decoder Architecture for Nonbinary LDPC Codes With High-Order Galois Fields

Basic-Set Trellis Min–Max Decoder Architecture for Nonbinary LDPC Codes With High-Order Galois Fields

Pham Thi, Huyen; Lee, Hanho
  • 期刊名称IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • 作者Pham Thi, Huyen; Lee, Hanho
  • 卷第26卷
  • 期第3期
  • 印刷ISSN1063-8210
  • 电子ISSN1557-9999
  • 文件大小2661.83KB
  • 发表时间2018-3
  • DOI10.1109/TVLSI.2017.2775646
  • 页码496-507
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