Molecular Methods in Developmental Biology Volume 127 ||
- 作者Guille, Matt
- 文件大小3728.30KB
- 发表时间1999
- DOI10.1385/1592596789
[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2009) - Tampa, FL (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - [Cover art]2009
[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI - Tampa, Florida, USA (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - Conference Information2009
[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI - Tampa, Florida, USA (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - Copyright Page2009
[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI - Tampa, Florida, USA (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - Author Index2009
[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI - Tampa, Florida, USA (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - Table of Contents2009
[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI - Tampa, Florida, USA (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - Title Page i2009
[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI - Tampa, Florida, USA (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - Title Page iii2009
[IEEE 2009 IEEE Computer Society Annual Symposium on VLSI - Tampa, Florida, USA (2009.05.13-2009.05.15)] 2009 IEEE Computer Society Annual Symposium on VLSI - Publisher's Information2009
Placement for Immunity of Transient Faults in Cell-Based Design of Nanometer CircuitsBhattacharya, Koustav; Ranganathan, Nagarajan · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2011
[IEEE 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009 - Taipei, Taiwan (2009.05.24-2009.05.27)] 2009 IEEE International Symposium on Circuits and Systems - A VLSI system architecture for optical flow computationBhattacharya, Koustav; Venkataraman, Mahalingam; Ranganathan, Nagarajan · 2009
[IEEE 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009 - Taipei, Taiwan (2009.05.24-2009.05.27)] 2009 IEEE International Symposium on Circuits and Systems - A strategy for soft error reduction in multi core designsHyman, Ransford; Bhattacharya, Koustav; Ranganathan, Nagarajan · 2009
[ACM Press the 18th ACM Great Lakes symposium - Orlando, Florida, USA (2008.05.04-2008.05.06)] Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 - A linear programming formulation for security-aware gate sizingBhattacharya, Koustav; Ranganathan, Nagarajan · 2008
[ACM Press Proceeding of the thirteenth international symposium - Bangalore, India (2008.08.11-2008.08.13)] Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08 - Reliability-centric gate sizing with simultaneous optimization of soft error rate, delay and powerBhattacharya, Koustav; Ranganathan, Nagarajan · 2008
[IEEE 2009 22nd International Conference on VLSI Design: concurrently with the 8th International Conference on Embedded Systems - New Delhi, India (2009.01.5-2009.01.9)] 2009 22nd International Conference on VLSI Design - RADJAM: A Novel Approach for Reduction of Soft Errors in Logic CircuitsBhattacharya, Koustav; Ranganathan, Nagarajan · 2009
[IEEE 2009 10th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2009.03.16-2009.03.18)] 2009 10th International Symposium on Quality of Electronic Design - A unified gate sizing formulation for optimizing soft error rate, cross-talk noise and power under process variationsBhattacharya, Koustav; Ranganathan, Nagarajan · 2009