Sandhi under the spotlight
- 期刊名称South African Journal of African Languages
- 作者Kosch, Ingeborg M.
- 卷第23卷
- 期第3期
- 印刷ISSN0257-2117
- 电子ISSN2305-1159
- 文件大小678.98KB
- 发表时间2003-01
- DOI10.1080/02572117.2003.10587213
- 页码144-153
Embedding of Large Boolean Functions for Reversible LogicSoeken, Mathias; Wille, Robert; Keszocze, Oliver; Miller, D. Michael; Drechsler, Rolf · ACM Journal on Emerging Technologies in Computing Systems · 2015
Verifying the structure and behavior in UML/OCL models using satisfiability solversPrzigoda, Nils; Soeken, Mathias; Wille, Robert; Drechsler, Rolf · IET Cyber-Physical Systems: Theory & Applications · 2016
Trading off circuit lines and gate costs in the synthesis of reversible logicWille, Robert; Soeken, Mathias; Michael Miller, D.; Drechsler, Rolf · Integration, the VLSI Journal · 2014
SyReC: A hardware description language for the specification and synthesis of reversible circuitsWille, Robert; Schönborn, Eleonora; Soeken, Mathias; Drechsler, Rolf · Integration, the VLSI Journal · 2016
[ACM Press the 47th Design Automation Conference - Anaheim, California (2010.06.13-2010.06.18)] Proceedings of the 47th Design Automation Conference on - DAC '10 - Reducing the number of lines in reversible circuitsWille, Robert; Soeken, Mathias; Drechsler, Rolf · 2010
[IEEE 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010) - Dresden (2010.03.8-2010.03.12)] 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010) - Verifying UML/OCL models using Boolean satisfiabilitySoeken, Mathias; Wille, Robert; Kuhlmann, Mirco; Gogolla, Martin; Drechsler, Rolf · 2010
[IEEE Conference Publications Design Automation and Test in Europe - Grenoble, France (2013.03.18-2013.03.22)] Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013 - Towards a Generic Verification Methodology for System ModelsWille, Robert; Gogolla, Martin; Soeken, Mathias; Kuhlmann, Mirco; Drechsler, Rolf · 2013
[IEEE 2008 IEEE Computer Society Annual Symposium on VLSI - Montpellier, France (2008.04.7-2008.04.9)] 2008 IEEE Computer Society Annual Symposium on VLSI - Using Higher Levels of Abstraction for Solving Optimization Problems by Boolean SatisfiabilityWille, Robert; Große, Daniel; Soeken, Mathias; Drechsler, Rolf · 2008