Semiconcurrent error detection in data pathsAntola, A.; Ferrandi, F.; Piuri, V.; Sami, M. · 2001

[IEEE Comput. Soc Design, Automation and Test in Europe - Paris, France (23-26 Feb. 1998)] Proceedings Design, Automation and Test in Europe - A low-redundancy approach to semi-concurrent error detection in data pathsAntola, A.; Piuri, V.; Sami, M. · 1998

[IEEE Comput. Soc First IEEE International Workshop on Electronic Design, Test and Applications '2002 - Christchurch, New Zealand (29-31 Jan. 2002)] Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002 - On-line diagnosis and reconfiguration of FPGA systemsAntola, A.; Piuri, V.; Sami, M. · 2002

[IEEE Comput. Soc. Press Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Boston, MA, USA (6-8 Nov. 1996)] Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Optimising high-level synthesis for self-checking arithmetic circuitsAntola, A.; Piuri, V.; Sami, M. · 1996

[IEEE Comput. Soc 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Austin, TX, USA (2-4 Nov. 1998)] Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223) - High-level synthesis of data paths with concurrent error detectionAntola, A.; Piuri, V.; Sami, M. · 1998

[IEEE Comput. Soc. Press EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition - Geneva, Switzerland (16-20 Sept. 1996)] Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition - A high-level synthesis approach to optimum design of self-checking circuitsAntola, A.; Piuri, V.; Sami, M. · 1996