![[IEEE 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. - Honolulu, HI, USA (June 13-15, 2006)] 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. - Advanced Junction Profile Engineering Featuring Laser Spike Annealing and Co-Implantation for Sub-30-nm Strained CMOS Devices]()
[IEEE 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. - Honolulu, HI, USA (June 13-15, 2006)] 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. - Advanced Junction Profile Engineering Featuring Laser Spike Annealing and Co-Implantation for Sub-30-nm Strained CMOS DevicesYamamoto, T.; Kubo, T.; Sukegawa, T.; Hashimoto, K.; Kase, M. · 2006