![[IEEE Comput. Soc 2001 IEEE International Workshop on Memory Technology, Design and Testing - San Jose, CA, USA (6-7 Aug. 2001)] Proceedings 2001 IEEE International Workshop on Memory Technology, Design and Testing - An approach for evaluation of redundancy analysis algorithms]()
[IEEE Comput. Soc 2001 IEEE International Workshop on Memory Technology, Design and Testing - San Jose, CA, USA (6-7 Aug. 2001)] Proceedings 2001 IEEE International Workshop on Memory Technology, Design and Testing - An approach for evaluation of redundancy analysis algorithmsShoukourian, S.; Vardanian, V.; Zorian, Y. · 2001