The testability of generalized counters under multiple faulty cellsChatterjee, A.; Abraham, J.A. · 1990

Signature analysis for analog and mixed-signal circuit test response compactionNagi, N.; Chatterjee, A.; Heebyung Yoon; Abraham, J.A. · 1998

Test generation for iterative logic arrays based on an N-cube of cell states modelChatterjee, A.; Abraham, J.A. · 1991

[IEEE IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (1-3 May 1990)] IEEE International Symposium on Circuits and Systems - Test generation for hybrid iterative logic arraysChatterjee, A.; Abraham, J.A. · 1990

[IEEE Comput. Soc. Press 8th International Conference on VLSI Design - New Delhi, India (4-7 Jan. 1995)] Proceedings of the 8th International Conference on VLSI Design - Efficient multisine testing of analog circuitsNagi, N.; Chatterjee, A.; Balivada, A.; Abraham, J.A. · 1995

[IEEE Comput. Soc. Press 1993 IEEE International Conference on Computer Design ICCD'93 - Cambridge, MA, USA (3-6 Oct. 1993)] Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93 - MIXER: Mixed-signal fault simulatorNagi, N.; Chatterjee, A.; Abraham, J.A. · 1993

[IEEE Comput. Soc. Press 1993 International Conference on Computer Aided Design (ICCAD) - Santa Clara, CA, USA (7-11 Nov. 1993)] Proceedings of 1993 International Conference on Computer Aided Design (ICCAD) - Fault-based automatic test generator for linear analog circuitsNagi, N.; Chatterjee, A.; Balivada, A.; Abraham, J.A. · 1993