Author index
- 期刊名称Faraday Symposia of the Chemical Society
- 卷第16卷
- 印刷ISSN0301-5696
- 文件大小48.69KB
- 发表时间1981
- DOI10.1039/fs9811600259
[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Which junction for advanced CMOS?-theory, benchmark and predictionsSkotnicki, T. · 2005
[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Anomalous doping profile in heavily doped GeHosawa, K.; Matsumoto, K.; Shibahara, K. · 2005
[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Benefits of heat-assist for laser annealingShibahara, K. · 2005
[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Ultra low energy (ULE) implant dose and activation monitoringHillard, R.; Borland, J.; Benjamin, M. · 2005
[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - A new junction technology for low-resistance contacts and Schottky barrier MOSFETsGrupp, D.E.; Connelly, D.; Faulkner, C.; Clifton, P.A. · 2005
[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Using boron cluster ion implantation to fabricate ultra-shallow junctionsJacobson, D. · 2005
[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Properties of ion-implanted strained-Si/SiGe heterostructuresSugii, N.; Morioka, J.; Ishidoya, Y.; Koyama, K.; Inada, T. · 2005
[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Design guideline for halo condition on CMOSFETs utilizing FLATsujii, H.; Adachi, K.; Ohuchi, K.; Aoki, N.; Ito, T.; Matsuo, K.; Suguro, K.; Ishimaru, K.; Ishiuchi, H. · 2005