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[IEEE Comput. Soc 2002 Design, Automation and Test in Europe Conference and Exhibition - Paris, France (4-8 March 2002)] Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition - Global responsibilities in SoC designScanlon, T. · 2002
[IEEE Comput. Soc 2002 Design, Automation and Test in Europe Conference and Exhibition - Paris, France (4-8 March 2002)] Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition - Formulation of SOC test scheduling as a network transportation problemKoranne, S.; Choudhary, V.S. · 2002
[IEEE Comput. Soc 2002 Design, Automation and Test in Europe Conference and Exhibition - Paris, France (4-8 March 2002)] Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition - Make your SOC design a winner: select the right memory IPRatford, V. · 2002
[IEEE Comput. Soc 2002 Design, Automation and Test in Europe Conference and Exhibition - Paris, France (4-8 March 2002)] Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition - Reconfigurable SoC--what will it look likeLewis, B.; Bolsens, I.; Lauwereins, R.; Wheddon, C.; Gupta, B.; Tanurhan, Y. · 2002
[IEEE Comput. Soc 2002 Design, Automation and Test in Europe Conference and Exhibition - Paris, France (4-8 March 2002)] Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition - Embedded diagnosis IPPateras, S. · 2002
[IEEE Comput. Soc 2002 Design, Automation and Test in Europe Conference and Exhibition - Paris, France (4-8 March 2002)] Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition - System design for flexibilityHaubelt, C.; Teich, J.; Richter, K.; Ernst, R. · 2002
[IEEE Comput. Soc 2002 Design, Automation and Test in Europe Conference and Exhibition - Paris, France (4-8 March 2002)] Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition - An adaptive dictionary encoding scheme for SOC data busesLv, T.; Henkel, J.; Lekatsas, H.; Wolf, W. · 2002
[IEEE Comput. Soc 2002 Design, Automation and Test in Europe Conference and Exhibition - Paris, France (4-8 March 2002)] Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition - Embedded robustness IPsDupont, E.; Nicolaidis, M.; Rohr, P. · 2002
Fault secure datapath synthesis using hybrid time and hardware redundancyKaijie Wu; Karri, R. · 2004
Secure Scan: A Design-for-Test Architecture for Crypto ChipsBo Yang; Kaijie Wu; Karri, R. · 2006
Algorithm-level recomputing with shifted operands-a register transfer level concurrent error detection techniqueKaijie Wu; Karri, R. · 2006
Concurrent error detection for involutional functions with applications in fault-tolerant cryptographic hardware designJoshi, N.; Kaijie Wu; Sundararajan, J.; Karri, R. · 2006
Selectively breaking data dependences to improve the utilization of idle cycles in algorithm level re-computing data pathsKaijie Wu; Karri, R. · 2003
Algorithm level recomputing using allocation diversity: a register transfer level approach to time redundancy-based concurrent error detectionKaijie Wu; Karri, R. · 2002
[IEEE 2005 42nd Design Automation Conference - Anaheim, CA, USA (2005.06.13-2005.06.17)] Proceedings. 42nd Design Automation Conference, 2005. - Secure scan: a design-for-test architecture for crypto chipsBo Yang, ; Kaijie Wu, ; Karri, R. · 2005
[IEEE Design, Automation and Test in Europe - Munich, Germany (07-11 March 2005)] Design, Automation and Test in Europe - Towards Designing Robust QCA Architectures in the Presence of Sneak Noise PathsKyosun Kim, ; Kaijie Wu, ; Karri, R. · 2005