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[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - Cold delay defect screeningChao-Wen Tseng, ; Mccluskey, E.J.; Xiaoping Shao, ; Wu, D.M. · 2000
[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - Fault escapes in duplex systemsMitra, S.; Saxena, N.R.; McCluskey, E.J. · 2000
[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - Detectability conditions for interconnection open defectsChampac, V.H.; Zenteno, A. · 2000
[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - Delta Iddq for testing reliabilityPowell, T.J.; Pair, J.; St. John, M.; Counce, D. · 2000
[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - Test generation for accurate prediction of analog specificationsVoorakaranam, R.; Chatterjee, A. · 2000
[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - Synthesis for arithmetic built-in self-testStroele, A.P. · 2000
[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - Integrating logic BIST in VLSI designs with embedded memoriesChickermane, V.; Richter, S.; Barnhart, C. · 2000
[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - P1450.1: STIL for the simulation environmentWohl, P.; Biggs, N. · 2000